Talk-Polywell.org

I mean nuclear war would devastate the planet, this obviously restrains to some degree even our craziest leaders. But these killer machines could selectively target people, leaving infrastructure, property the evnvironment alone. I am not quite sure how is that different from current status. Replac...

parallel wrote:

that we have accepted to conduct tests when they verify the existence and validity of LENR.

This sounds pretty much like NDA prevents publishing negative results...

Looks like they are fishing for 'authorities' that can be cheated by incomplete experiments just like Rossi did in the past...

But an ~30X improvement in density (based on size reduction of the smallest feature) really means x squared or 900x improvement in the number of transistors on a die of the same size. Unfortunately, those doublings already count that in (density defined as number of transistors per 2D surface). So ...

Steven Krivit of the New Energy Times continually supports Widom Larsen theory. He does so while attacking the term cold fusion, and attacking credible cold fusion researchers. I've heard speculation that he may have a vested interest in Widom Larsen theory. Does anyone here have any information? A...

It talks about the fact that they've reached the absolute smallest transister, an atom, which is .03NM wide. Current projections have us entering the 11NM size range, down from 16, further down from 28. Assuming we overcome charge bleed with non-silicon materials, I believe we'll hit the theoretica...

I think we both agree that you need to adjust your code if you are going from single core code to multicore (and IME, it is only one core or multiple cores, it is usually easy to write the code so that it adapts to any number of cores available, as long as model is symmetric). I disagree. It's not ...

Part of original debate: So now you agree with me and not your own previous statement? That's all on this specific subset of the original conversation. No. I guess you are mixing two things. There are two directions in increasing the performance: - increasing performance per core - increasing numbe...

Edit: Clarification, syntax hasn't changed and the compilation from high level code to low level code hasn't changed that much. Speaking from experience writing compilers, linker-loaders, and assemblers. You're still only optimising for x86 or x64, you tell the compiler which you intend to use, x86...

As an example of what modern CPUs can do, consider the pseudo assembly code: load A from X inc A store A to X load A from Y dec A store A to Y The instruction decoder can note that the second half of that code doesn't depend on the results of the first half, allocate a separate internal register to...

A good summary. I agree completely. There are arguments however; about how much power programmers need to leverage. Each industry requires a different level of control. Most coding is done with a complete disregard of how it will be converted to assembly or machine code. Most of us are more worried...

If they are linear yes, otherwise no. I don't think you read my comment right. Your link reiterates exactly what I said. To avoid execution out of order, linear code is "queued" accordingly, otherwise it can be combined in a single cycle. The article states this and I agree 100%. The question was w...

They increased the cache much as I have repeatedly said and the allowed 2 load/store operations per cycle (increased registers and/or extended instruction set). So, do you think that those "2 load/store operations per cycle" are explicitly visible in programming model ? :) If they are linear yes, o...

hanelyp wrote: On a side note, the internal architecture of modern processors has little resemblance to the instruction code model programmed for.

Well, you can also say that for high performance CPU, instruction set matters much less than people tend to believe.

ScottL wrote:They increased the cache much as I have repeatedly said and the allowed 2 load/store operations per cycle (increased registers and/or extended instruction set).

So, do you think that those "2 load/store operations per cycle" are explicitly visible in programming model ?

Well, sorry, now I have lost you. What are you speaking about? Is it your interpretation that Moore's law is about clock frequency?! Sorry if I was unclear. My comment has nothing to do with Moore's law. We agree that cycle speed a P4 2.2GHz and a single core of a quadcore 2.2GHz are the same corre...